Blog
Notes on the buses and memories on the DNL-N6, and the odd Linux piece.
MIPI CSI-2
Camera Serial Interface 2 — the two-wire-per-lane link used to bring a CMOS sensor into an MCU or ISP.
Michele Forese
HexaSPI
Hexadeca-SPI (x16) — a 16-bit serial memory bus for PSRAM and similar devices, without a parallel DRAM interface.
Michele Forese
BGA packages
Ball grid array — what the balls under the chip are for, pitch, and what that means for layout and assembly.
Michele Forese
OTP memory
One-time programmable fuses — what they are, what they are for, and why you do not use them as EEPROM.
Michele Forese
SRAM, DRAM, PSRAM, NOR, NAND
The memories you actually put on a board — what each one is good at, and the trade-offs.
Michele Forese
Ethernet TSN
Time-Sensitive Networking — scheduled, bounded-latency Ethernet for industrial links.
Michele Forese
CAN FD and TTCAN
Flexible Data-rate CAN and time-triggered CAN — two modes on the same controller family.
Michele Forese
I2C and I3C
Two-wire control buses — I2C as the workhorse, I3C as the MIPI successor with speed and in-band interrupts.
Michele Forese
systemctl on Debian, Ubuntu, and Fedora
Start, stop, enable, and debug systemd services. The commands that matter, plus the unit-name differences between Debian and Fedora.
Michele Forese